1. Responsible for large-scale digital system architecture design;
2. Responsible for organizing the implementation of digital algorithm design, modeling and simulation verification;
3. Responsible for organizing the implementation of digital circuit module division, circuit realization and system integration;
4. Responsible for organizing the interaction work of RTL code synthesis, timing analysis and back-end layout design;
5. Work with the digital verification team;
6. Responsible for SoC system or subsystem integration;
7. Responsible for the writing of chip design documents.
1. Bachelor's degree or above, majoring in communication, microelectronics, electronic engineering;
2. At least 3 years of experience in digital integrated circuit design, understanding wireless communication protocols, proficiency in DFT preferred;
3. Experience in successful digital large-scale circuit tape-outs ,and back-end experience such as synthesis and PT preferred;
4. Proficient in Verilog/VHDL/systemverilog for module design;
5. Proficient in large-scale digital circuit system architecture design, simulation verification, circuit synthesis, and able to independently defining and dividing digital modules and integrating system;
6. Proficient in scripting languages such as tcl/perl/shell;
7. Good English proficiency, teamwork spirit , learning ability, and leadership.
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